The present invention relates to stacked microelectronic dies and methods for stacking microelectronic dies.
Packaged microelectronic assemblies, such as memory chips and microprocessor chips, typically include a microelectronic device mounted to a substrate and encased in a plastic protective covering. The device includes functional features, such a memory cells, processor circuits, and interconnecting circuitry. The device also typically includes bond pads electrically coupled to the functional features. The bond pads are coupled to pins or other types of terminals that extend outside the protective covering for connecting the microelectronic device to buses, circuits and/or other microelectronic assemblies.
One conventional approach to reducing the surface area occupied by packaged microelectronic devices in compact electronic products is to stack one packaged device on another packaged device having an identical configuration. For example, as shown in FIG. 1, an upper packaged microelectronic device 20b can be stacked on a lower packaged microelectronic device 20a (collectively referred to as packaged devices 20) and the assembly of packaged devices 20 can be attached to a printed circuit board (PCB) 30. Each packaged device 20 typically includes a die 24 encased in an encapsulant 23. Each die 24 has a plurality of die bond pads 25 connected to pins 43 that extend outside the encapsulant 23. Corresponding pins 43 of each packaged device 20 are connected directly to each other and to corresponding bond pads 31 on the PCB 30. The packaged devices 20 are also connected to each other by attaching an adhesive 11 between the encapsulant 23 of the lower packaged device 20a and the encapsulant 23 of the upper packaged device 20b. 
In another conventional arrangement shown in FIG. 2, two identical packaged devices 120 (shown as a lower packaged device 120a and an upper packaged device 120b) are connected to each other and to a PCB 130 with solder balls 143. Each packaged device 120 can include a die 124 mounted to a substrate PCB 140 and encased with an encapsulant 123. Each die 124 has die bond pads 125 connected with wire-bonds 126 to corresponding bond pads 131a of the substrate PCB 140. The bond pads 131a are connected to solder ball pads 131b with circuitry internal to the support PCB 140. The solder balls 143 connect the solder ball pads 131b of the upper package 120b to the solder ball pads 131b of the lower package 120a. Additional solder balls 143 connect the lower package 120a to corresponding bond pads 131c of the PCB 130.
One drawback with the conventional arrangements described above with reference to FIGS. 1 and 2 is that the stacked packaged devices are connected to each other. Accordingly, it can be difficult to remove and replace one packaged device without removing or damaging the other. Furthermore, this arrangement can require several tests to confirm that the packaged devices remain operable after each manufacturing step. For example, the packaged devices may be tested individually before they are coupled, then tested again after they are coupled to each other, and then tested yet again after the coupled packaged devices are mounted to the PCB. Each test can add to the time required to complete the final product, and can accordingly reduce the efficiency of the manufacturing process.
The present invention is directed toward microelectronic package assemblies and methods for stacking packaged microelectronic devices. A method in accordance with one aspect of the invention includes positioning a first packaged microelectronic device adjacent to a support member having support member circuitry, and coupling the first packaged device to a first portion of the support member circuitry. The first packaged microelectronic device includes a first microelectronic die at least partially encased in a first encapsulant to define a first package configuration. The method further includes positioning at least proximate to the first packaged device a second packaged microelectronic device having a second microelectronic die at least partially encased in a second encapsulant to define a second package configuration different than the first package configuration. The second packaged device is electrically coupled to a second portion of the support member circuitry, and the first packaged device is positioned between the support member and the packaged device. In a further aspect of this embodiment, the second packaged microelectronic device can be connected to the support member without being connected to the first packaged microelectronic device. Accordingly, the second packaged microelectronic device package can be removed from the support member without removing the first packaged microelectronic device.
The invention is also directed toward an assembly of packaged microelectronic devices. The assembly can include a support member having support member circuitry, and a first packaged microelectronic device connected to at least one of the support member and the support member circuitry. The first packaged device has a first microelectronic die at least partially encased in a first encapsulant to define a first package configuration. The assembly can further include a second packaged microelectronic device connected to at least one of the support member and the support member circuitry with the first packaged device positioned between the support member and the second packaged device. The second packaged device has a second microelectronic die at least partially encased in a second encapsulant to define a second package configuration different than the first package configurations, and the second packaged device can be connected directly to the support member without being connected to the first packaged device.